Speaker
Konstantinos Axiotis
Description
The High Luminosity Large Hadron Collider (HL LHC) poses novel challenges for the ATLAS Trigger and Data Acquisition (TDAQ) system. The substantial increase in data generated demands a trigger system capable of efficient data handling. Field-Programmable Gate Arrays (FPGAs) offer fixed latency and are adept for high-frequency applications, thus finding utility across various segments of the ATLAS trigger infrastructure. This presentation highlights select research and development projects leveraging custom and off-the-shelf FPGA boards within the ATLAS framework.
